fixed mmio thanks wes <3

justfile

@@ -1,3 +1,4 @@
+
 # build the OS
 build-os:
 	rm build/*

src/lib.rs

@@ -17,7 +17,7 @@ pub enum BoardType {
 
 impl BoardType {
     /// detect the type of Raspberry Pi board
-    pub fn detect() -> Self {
+    fn detect() -> Self {
         let mut reg_data: u32;
 
         unsafe {
@@ -34,15 +34,17 @@ impl BoardType {
     }
 
     /// return the MMIO base address
-    pub fn mmio_base_addr(self) -> *const u32 {
+    fn mmio_base_addr(self) -> *const u8 {
         match self {
-            BoardType::PiZeroOne | BoardType::Unknown => 0x2000_0000 as *const u32,
-            BoardType::PiTwo | BoardType::PiThree => 0x3F00_0000 as *const u32,
-            BoardType::PiFour => 0xFE00_0000 as *const u32,
+            BoardType::PiZeroOne | BoardType::Unknown => 0x2000_0000 as *const u8,
+            BoardType::PiTwo | BoardType::PiThree => 0x3F00_0000 as *const u8,
+            BoardType::PiFour => 0xFE00_0000 as *const u8,
         }
     }
 }
 
+/// loops
+
 #[no_mangle]
 pub extern "C" fn kernel_main() {
     let board_type = BoardType::detect();

src/mem.rs

@@ -1,7 +1,8 @@
 pub struct MemoryMappedIo {
-    base_addr: *const u32,
+    base_addr: *const u8,
 }
 
+#[allow(dead_code)]
 impl MemoryMappedIo {
     pub fn init(board_type: crate::BoardType) -> Self {
         let mem = MemoryMappedIo { base_addr: board_type.mmio_base_addr() };
@@ -9,16 +10,19 @@ impl MemoryMappedIo {
         mem
     }
 
-    fn uart_init(&self) {}
+    fn uart_init(&self) {
+        self.write_word(PeripheralAddress::UartCr, 0x0000_0000);
+        self.write_word(PeripheralAddress::Gppud, 0x0000_0000);
+    }
 
     // receive fifo empty
     fn recv_fifo_empty(&self) -> bool {
-        self.read_word(PeripheralAddress::UartFr) & (1 << 5) > 0
+        self.read_word(PeripheralAddress::UartFr) & (1 << 4) > 0
     }
 
     // transmit fifo full
     fn tran_fifo_full(&self) -> bool {
-        self.read_word(PeripheralAddress::UartFr) & (1 << 4) > 0
+        self.read_word(PeripheralAddress::UartFr) & (1 << 5) > 0
     }
 
     pub fn write_str(&self, s: &str) {
@@ -26,12 +30,16 @@ impl MemoryMappedIo {
     }
 
     pub fn write_byte(&self, byte: u8) {
-        while self.tran_fifo_full() {}
+        while self.tran_fifo_full() {
+            unsafe { asm!("nop") }
+        }
         self.write_word(PeripheralAddress::UartDr, byte as u32);
     }
 
     pub fn get_byte(&self) -> u8 {
-        while self.recv_fifo_empty() {}
+        while self.recv_fifo_empty() {
+            unsafe { asm!("nop") }
+        }
         self.read_word(PeripheralAddress::UartDr) as u8
     }